A Circuit-level Implementation of Fast, Energy-Efficient CMOS
Comparators for High Performance Microprocessors
Oguz Ergin, Kanad Ghose, Gurhan Kucuk, Dmitry Ponomarev
Proceedings of the 20th International Conference on Computer Design (ICCD'02),
Freiburg, Germany, September 2002, pp.118-121.
Abstract
Datapath components in modern high performance superscalar processors
employ a significant amount of associative addressing logic based on the
use of comparators that dissipate energy on a mismatch. These comparators
are used to detect a full match, but as mismatches are much more common
than full matches in some components of the CPU, considerable
energy-inefficiencies occur within the associative logic. We propose the
design of two new comparator circuits that predominantly dissipate energy
on a match, thus resulting in very significant savings in comparator power
dissipation. The proposed designs are evaluated using SPICE simulations
of actual VLSI layouts of the comparators in 0.18 micron 6-metal layer
process and micro-architectural level statistics.
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